Semiconductor Substrate

A document covering the definition, types, manufacturing processes, and industry structure of the substrates that form the foundation of semiconductor devices, along with the latest trends for 2024-20

Semiconductor Substrate

Overview

A semiconductor substrate (Korean: 반도체 기판; Hanja: 半導體基板) is a plate-shaped (板狀) material that serves as the foundation when fabricating or packaging semiconductor devices. It acts as the physical support for the device while transmitting electrical signals and power, and serves as a pathway for dissipating heat generated during operation to the outside. In the narrow sense, it refers to the disc on which circuits are directly formed, such as a silicon wafer; in the broad sense, it also includes package substrates (such as FC-BGA and ABF substrates) that connect finished chips to a board.

Key Details

Role and Importance

The semiconductor substrate is not merely a support but a core component that determines the electrical characteristics of the device. If the crystal defect density is high, leakage current increases and yield drops; if the coefficient of thermal expansion (CTE) does not match that of the chip, the joints crack during thermal cycling. In high-frequency and high-power environments, dielectric loss and thermal conductivity determine performance. In advanced packaging, the substrate's importance has grown to the point that it is called the de facto 'new front-end,' handling ultra-high-speed wiring between chips.

Types

1. Silicon wafer: a single-crystal silicon substrate used by more than about 90% of all semiconductors. 300 mm (12-inch) is the mainstream size.

2. Compound semiconductor substrate: GaAs, InP, SiC (silicon carbide), GaN (gallium nitride), etc. Used in high-frequency RF devices, power semiconductors, and optical devices.

3. Package substrate: FC-BGA, ABF (Build-up Film), BT resin substrates, etc. A key component of CPU, GPU, and HBM packages.

4. Glass substrate: a next-generation substrate being pushed toward commercialization in the mid-2020s.

5. Flexible substrate: a film-type substrate made of polyimide (PI) and similar materials. Used in displays and wearable devices.

Manufacturing Process (Wafer-Based)

Ingot growth: a single-crystal ingot is pulled from molten silicon using the Czochralski (CZ) method. The FZ method is used for power devices that require high purity.
Slicing: the ingot is cut into thin slices with a diamond wire.
Lapping, etching, and polishing (CMP): flatness and surface roughness are controlled at the nanometer level.
Epitaxy: a high-purity single-crystal thin film is grown on the surface.
Inspection: crystal defects, particles, and flatness are measured to assign grades.

Key Performance Metrics

Crystal defect density and surface flatness (TTV, warp, bow)
Coefficient of thermal expansion (CTE) matching and thermal conductivity
Dielectric constant and dielectric loss (Df)
Wiring density (line/space), number of layers, and fine via formation capability

Industry Structure and Major Companies

Silicon wafers are dominated by an oligopoly of a few companies, including Shin-Etsu Chemical, SUMCO, GlobalWafers, and SK Siltron. The package substrate market is contested by Ibiden, Shinko Electric, Unimicron, Daeduck Electronics, Simmtech, and others, and large-area FC-BGA for AI servers faced a supply shortage for some time. SiC substrates are led by Wolfspeed, Coherent, SK Siltron, Yes Power Technologies, and others.

Latest Trends (2024-2025)

Commercialization of glass substrates: Intel, Samsung Electronics, SKC (Absolics), LG Innotek, and others began full-scale investment in glass substrates in 2024-2025. Glass substrates are considered advantageous for large-area AI chip packaging because they offer better flatness and dimensional stability than organic substrates.
AI accelerators and large-area, multi-layer substrates: as Nvidia GPU and HBM packages have grown larger, demand surged for large-area substrates over 100 mm and build-up structures with more than 20 layers.
2.5D/3D packaging and hybrid bonding: as silicon interposers, TSVs (through-silicon vias), and chiplet architectures spread, fine wiring technology connecting substrate-interposer-chip became a core competitive advantage.
Power semiconductor substrates: the shift to 200 mm (8-inch) SiC substrates is underway due to power efficiency demands from EVs, solar power, and data centers, and GaN-on-Si substrates are also drawing attention.
Supply chain restructuring: subsidy competition and export controls among the United States, EU, Japan, and China drove efforts to expand domestic production of substrate materials and equipment.
Substrate-less packaging: some companies and research institutes are studying 'substrate-less' structures that omit the substrate, as well as glass interposers.